Principal Engineer, Process Dev, Dry Etch

As a Plasma Etch Process Development Engineer in the Dry Etch Research and Development Group at Micron Technology, Inc., you will design and optimize plasma etch processes for Micron's leading edge DRAM and NAND/NVM Flash products.   As a process development engineer you will take ideas from conception through process development then implementation in our production facilities.  In addition to your technical responsibilities you will also manage projects of a highly technical nature.  This role is critical to the success of Micron's products and may require travel to Micron manufacturing sites.  Primary areas of responsibility include plasma dry etch process characterization, optimization, design, troubleshooting, process transfer and fundamental research. Dry Etch Process Development Engineers interact with groups such as process integration, electrical failure analysis, yield enhancement, manufacturing and equipment vendors to ensure robust etch processes that meet the precise physical and electrical requirements for Micron products.

As a Principal Engineer – Dry Etch – NVM at Micron Technology, Inc., you will be required to travel for brief business purposes. This position requires that you have an aptitude for a research and development (R&D) environment, good organization skills and the ability to work independently or in a team environment. This position may often require weekend support to R&D Pilot Line Fab in case of manufacturing line excursions/downs and monitoring program critical lot through various modules as is deemed necessary.

Your responsibilities will include, but are not limited to:

• R&D Pilot Line Fab
• Updating the Fab engineers on customer issues and technology needs.
• Supporting root cause defect and unique fail mode analysis.
• Process Development and Integration
• Delivering advanced technology to meet future product nodes.
• Developing recipes to meet structural & electrical requirements.
• Delivering processes needed for NAND structures like high aspect ratio (HAR) structures.
• Managing wafers though Dry Etch levels in support of special requirements.
• Other Process Areas
• Working in cross-functional teams to jointly develop NVM and CMOS structures.
• Supporting cross-functional failure analysis and yield improvement.
• Dry Etch peers
• Maintaining or developing expertise in multiple process, hardware, or technology areas.
• Serving as a resource for peers in recipe & process development.
• Mentor and train new and junior team members

Qualifications: PhD in Engineering or Science with >7 years of highly relevant experience in Dry Etch process development

Successful candidates must have:

• Advanced understanding of plasma physics and sources used in plasma etching.
• Understanding of dry etch processing principles.
• Understanding in one or more of the following topics Transport phenomena, Electromagnetics, Atomic/Molecular physics, and Surface phenomena.
• An understanding on semiconductor process.
• Knowledge of advanced data analysis techniques and scripting is highly preferred
• Strong computer skills, including MS Office.
• Solid trouble shooting, experimental design and data analysis skills.
• Rudimentary understanding of process control and Statistical Process Control (SPC).
• An understanding of solid state devices.